Surface directed phase separation of semiconductor ferroelectric polymer blends and their use in non-volatile memories
The polymer phase separation of P(VDF-TrFE):F8BT blends is studied in detail. Its morphology is key to the operation and performance of memory diodes. In this study, it is demonstrated that it is possible to direct the semiconducting domains of a phase-separating mixture of P(VDF-TrFE) and F8BT in a...
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| Main Authors: | , , , , , , |
|---|---|
| Format: | Article (Journal) |
| Language: | English |
| Published: |
2015
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| In: |
Advanced functional materials
Year: 2014, Volume: 25, Issue: 2, Pages: 278-286 |
| ISSN: | 1616-3028 |
| DOI: | 10.1002/adfm.201401896 |
| Online Access: | Verlag, Volltext: https://doi.org/10.1002/adfm.201401896 Verlag, Volltext: https://onlinelibrary.wiley.com/doi/abs/10.1002/adfm.201401896 |
| Author Notes: | Albert van Breemen, Tomasz Zaba, Vsevolod Khikhlovskyi, Jasper Michels, Rene Janssen, Martijn Kemerink, and Gerwin Gelinck |
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| 520 | |a The polymer phase separation of P(VDF-TrFE):F8BT blends is studied in detail. Its morphology is key to the operation and performance of memory diodes. In this study, it is demonstrated that it is possible to direct the semiconducting domains of a phase-separating mixture of P(VDF-TrFE) and F8BT in a thin film into a highly ordered 2D lattice by means of surface directed phase separation. Numerical simulation of the surface-controlled de-mixing process provides insight in the ability of the substrate pattern to direct the phase separation, and hence the regularity of the domain pattern in the final dry blend layer. By optimizing the ratio of the blend components, the number of electrically active semiconductor domains is maximized. Pattern replication on a cm-scale is achieved, and improved functional device performance is demonstrated in the form of a 10-fold increase of the ON-current and a sixfold increase in current modulation. This approach therefore provides a simple and scalable means to higher density integration, the ultimate target being a single semiconducting domain per memory cell. | ||
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