Concepts for the XIDer readout ASIC incorporating a pipelined ADC with very low dead time - Schimansky, David; Busca, P.; Erdinger, Florian; Fajardo, P.; Fischer, Peter (Journal of Instrumentation, 2021)
We present the first concept for the analog front-end of the readout ASIC for the XIDer (X-ray Integrating Detector) detector system which is being developed by a collaboration between the ESRF and Heidelberg University. The ESRF's Extremely Brilliant Source (EBS) upgrade which has been completed recently provides X-ray beams of unprecedented quality, requiring new photon detection instruments. The XIDer project has been launched to develop a new versatile pixel detector which will be tailored to match requirements imposed by this upgrade. The core challenges include fast signal acquisition, large dynamic range and single photon sensitivity. A first prototype ASIC for the analog front-end of a single pixel has been manufactured. It is based on a pipelined two-stage charge removal circuit which digitizes the incident signal on the fly. We will present measurement results of the first test chip and concepts for the final system-on-chip implementation integrating several tens of thousands of pixels.