The BrainScaleS-2 accelerated neuromorphic system with hybrid plasticity
Since the beginning of information processing by electronic components, the nervous system has served as a metaphor for the organization of computational primitives. Brain-inspired computing today encompasses a class of approaches ranging from using novel nano-devices for computation to research int...
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| Main Authors: | , , , , , , , , , |
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| Format: | Article (Journal) |
| Language: | English |
| Published: |
24 February 2022
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| In: |
Frontiers in neuroscience
Year: 2022, Volume: 16, Pages: 1-21 |
| ISSN: | 1662-453X |
| Online Access: | Verlag, kostenfrei, Volltext: https://www.frontiersin.org/article/10.3389/fnins.2022.795876
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| Author Notes: | Christian Pehle, Sebastian Billaudelle, Benjamin Cramer, Jakob Kaiser, Korbinian Schreiber, Yannik Stradmann, Johannes Weis, Aron Leibfried, Eric Müller and Johannes Schemmel |
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| 245 | 1 | 4 | |a The BrainScaleS-2 accelerated neuromorphic system with hybrid plasticity |c Christian Pehle, Sebastian Billaudelle, Benjamin Cramer, Jakob Kaiser, Korbinian Schreiber, Yannik Stradmann, Johannes Weis, Aron Leibfried, Eric Müller and Johannes Schemmel |
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| 520 | |a Since the beginning of information processing by electronic components, the nervous system has served as a metaphor for the organization of computational primitives. Brain-inspired computing today encompasses a class of approaches ranging from using novel nano-devices for computation to research into large-scale neuromorphic architectures, such as TrueNorth, SpiNNaker, BrainScaleS, Tianjic, and Loihi. While implementation details differ, spiking neural networks—sometimes referred to as the third generation of neural networks—are the common abstraction used to model computation with such systems. Here we describe the second generation of the BrainScaleS neuromorphic architecture, emphasizing applications enabled by this architecture. It combines a custom analog accelerator core supporting the accelerated physical emulation of bio-inspired spiking neural network primitives with a tightly coupled digital processor and a digital event-routing network. | ||
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