APA (7th ed.) Citation

Camplani, A., Dittmeier, S., Annovi, A., Axiotis, K., Beccherle, R., Biesuz, N., . . . Zinßer, J. (2023). Intel Stratix 10 FPGA design for track reconstruction for the ATLAS experiment at the HL-LHC. Journal of Instrumentation, 18(6), . https://doi.org/10.1088/1748-0221/18/06/P06029

Chicago Style (17th ed.) Citation

Camplani, A., et al. "Intel Stratix 10 FPGA Design for Track Reconstruction for the ATLAS Experiment at the HL-LHC." Journal of Instrumentation 18, no. 6 (2023). https://doi.org/10.1088/1748-0221/18/06/P06029.

MLA (9th ed.) Citation

Camplani, A., et al. "Intel Stratix 10 FPGA Design for Track Reconstruction for the ATLAS Experiment at the HL-LHC." Journal of Instrumentation, vol. 18, no. 6, 2023, https://doi.org/10.1088/1748-0221/18/06/P06029.