An implementation of tensor product patch smoothers on GPUs - Cui, Cu; Große-Bley, Paul; Kanschat, Guido; Strzodka, Robert (SIAM journal on scientific computing, 2025)
In this paper, a task-scheduling approach to efficiently calculating sparse symmetric matrix-vector products and designed to run on graphics processing units (GPUs) is presented. The main premise is that, for many sparse symmetric matrices occurring in common applications, it is possible to obtain significant reductions in memory usage and improvements in performance when the matrix is prepared in certain ways prior to computation. The preprocessing proposed in this paper employs task scheduling to overcome the difficulties that have suppressed the development of methods taking advantage of the symmetry of sparse matrices. The performance of the proposed task-scheduling method is verified using a Kepler (Tesla K40c) graphics accelerator, and is compared to the performance of cuSPARSE library functions on a GPU and to functions from the Intel MKL on central processing units (CPUs) executed in the parallel mode. The obtained results indicate that the proposed approach for sparse symmetric matrix-vector products results in up to a 40% reduction in memory usage, as compared to nonsymmetric matrix storage formats, while retaining good throughput. Compared to cuSPARSE and Intel MKL functions for sparse symmetric matrices, the proposed TSMV approach allowed us to achieve a significant speedup (of over one order of magnitude).
Gesehen am 11.08.2025