Time performance of Analog Pixel Test Structures with in-chip operational amplifier implemented in 65 nm CMOS imaging process
In the context of the CERN EP R&D on monolithic sensors and the ALICE ITS3 upgrade, the Tower Partners Semiconductor Co (TPSCo) 65nm process has been qualified for use in high energy physics, and adopted for the ALICE ITS3 upgrade. An Analog Pixel Test Structure (APTS) featuring fast per pixel o...
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| Hauptverfasser: | , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , |
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| Dokumenttyp: | Article (Journal) |
| Sprache: | Englisch |
| Veröffentlicht: |
18 November 2024
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| In: |
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment
Year: 2025, Jahrgang: 1070, Pages: 1-15 |
| ISSN: | 1872-9576 |
| DOI: | 10.1016/j.nima.2024.170034 |
| Online-Zugang: | Verlag, lizenzpflichtig, Volltext: https://doi.org/10.1016/j.nima.2024.170034 Verlag, lizenzpflichtig, Volltext: https://www.sciencedirect.com/science/article/pii/S0168900224009604 
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| Verfasserangaben: | Gianluca Aglieri Rinella, Luca Aglietta, Matias Antonelli, Francesco Barile, Franco Benotto, Stefania Maria Beolè, Elena Botta, Giuseppe Eugenio Bruno, Francesca Carnesecchi, Domenico Colella, Angelo Colelli, Giacomo Contin, Giuseppe De Robertis, Floarea Dumitrache, Domenico Elia, Chiara Ferrero, Martin Fransen, Alex Kluge, Shyam Kumar, Corentin Lemoine, Francesco Licciulli, Bong-Hwi Lim, Flavio Loddo, Magnus Mager, Davide Marras, Paolo Martinengo, Cosimo Pastore, Rajendra Nath Patra, Stefania Perciballi, Francesco Piro, Francesco Prino, Luciano Ramello, Arianna Grisel Torres Ramos, Felix Reidt, Roberto Russo, Valerio Sarritzu, Umberto Savino, David Schledewitz, Mariia Selina, Serhiy Senyukov, Mario Sitta, Walter Snoeys, Jory Sonneveld, Miljenko Suljic, Triloki Triloki, Andrea Turcato |
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| 245 | 1 | 0 | |a Time performance of Analog Pixel Test Structures with in-chip operational amplifier implemented in 65 nm CMOS imaging process |c Gianluca Aglieri Rinella, Luca Aglietta, Matias Antonelli, Francesco Barile, Franco Benotto, Stefania Maria Beolè, Elena Botta, Giuseppe Eugenio Bruno, Francesca Carnesecchi, Domenico Colella, Angelo Colelli, Giacomo Contin, Giuseppe De Robertis, Floarea Dumitrache, Domenico Elia, Chiara Ferrero, Martin Fransen, Alex Kluge, Shyam Kumar, Corentin Lemoine, Francesco Licciulli, Bong-Hwi Lim, Flavio Loddo, Magnus Mager, Davide Marras, Paolo Martinengo, Cosimo Pastore, Rajendra Nath Patra, Stefania Perciballi, Francesco Piro, Francesco Prino, Luciano Ramello, Arianna Grisel Torres Ramos, Felix Reidt, Roberto Russo, Valerio Sarritzu, Umberto Savino, David Schledewitz, Mariia Selina, Serhiy Senyukov, Mario Sitta, Walter Snoeys, Jory Sonneveld, Miljenko Suljic, Triloki Triloki, Andrea Turcato |
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| 520 | |a In the context of the CERN EP R&D on monolithic sensors and the ALICE ITS3 upgrade, the Tower Partners Semiconductor Co (TPSCo) 65nm process has been qualified for use in high energy physics, and adopted for the ALICE ITS3 upgrade. An Analog Pixel Test Structure (APTS) featuring fast per pixel operational-amplifier-based buffering for a small matrix of four by four pixels, with a sensor with a small collection electrode and a very non-uniform electric field, was designed to allow detailed characterization of the pixel performance in this technology. Several variants of this chip with different pixel designs have been characterized with a 120GeV/c positive hadron beam. This result indicates that the APTS-OA prototype variants with the best performance achieve a time resolution of 63ps with a detection efficiency exceeding 99% and a spatial resolution of 2μm, highlighting the potential of TPSCo 65 nm CMOS imaging technology for high-energy physics and other fields requiring precise time measurement, high detection efficiency, and excellent spatial resolution. | ||
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