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Towards quantitative high-throughput 3D localization microscopy by Deschamps, Joran (Author)

Control, readout and commissioning of the ultra-high speed 1 megapixel DSSC X-Ray camera for the european XFEL by Tangl, Manfred (Author)

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Control, readout and commissioning of the ultra-high speed 1 megapixel DSSC X-Ray camera for the european XFEL by Tangl, Manfred (Author)

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Towards quantitative high-throughput 3D localization microscopy by Deschamps, Joran (Author)

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Evaluation of single photon avalanche diode arrays for imaging fluorescence correlation spectroscopy: FPGA-based data readout and fast correlation analysis on CPUs, GPUs and FPGAs by Buchholz, Jan (Author)

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Evaluation of single photon avalanche diode arrays for imaging fluorescence correlation spectroscopy: FPGA-based data readout and fast correlation analysis on CPUs, GPUs and FPGAs by Buchholz, Jan (Author)

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Feasibility study to use an SRAM-based FPGA in the readout electronics of the upgraded LHCb Outer Tracker detector by Färber, Christian (Author)

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Feasibility study to use an SRAM-based FPGA in the readout electronics of the upgraded LHCb outer tracker detector by Färber, Christian (Author)

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Online- und Offline-Prozessierung von biologischen Zellbildern auf FPGAs und GPUs by Gipp, Markus (Author)

Online- und Offline-Prozessierung von biologischen Zellbildern auf FPGAs und GPUs by Gipp, Markus (Author)

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Acceleration of astrophysical simulations with special hardware by Marcus Martínez, Guillermo Aníbal (Author)

Acceleration of astrophysical simulations with special hardware by Marcus Martínez, Guillermo Aníbal (Author)

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A track reconstructing low-latency trigger processor for high-energy physics by Cuveland, Jan de (Author)

Reconfigurable Computing: Architectures, Tools and Applications: 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings

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A track reconstructing low-latency trigger processor for high-energy physics by Cuveland, Jan de (Author)

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International Conference on Field Programmable Logic and Applications, 2009: FPL 2009; Aug. 31, 2009 - Sept. 2, 2009, Prague, Czech Republic; proceedings

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International Conference on Reconfigurable Computing and FPGAs, 2009: ReConFig 2009; 9 - 11 Dec. 2009, Cancun, Mexico; proceedings

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Design and implementation of a multi-class network architecture for hardware neural networks by Philipp, Stefan (Author)

Design and implementation of a multi-class network architecture for hardware neural networks by Philipp, Stefan (Author)

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Evolution in Hardware: eine Experimentalplattform zum parallelen Training analoger neuronaler Netzwerke by Schmitz, Tillmann (Author)

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