The high performance readout chain for the DSSC 1Megapixel detector, designed for high throughput during pulsed operation mode

The readout chain of the DSSC 1M pixel detector currently built at DESY, Hamburg for the European X-Ray Free Electron Laser is described. The system operates in pulsed operation mode comparable to the new ILC. Each 0.1 seconds 800 images of 1M pixels are produced and readout by the DSSC DAQ electron...

Full description

Saved in:
Bibliographic Details
Main Authors: Tangl, Manfred (Author) , Soldat, Jan (Author) , Kugel, Andreas (Author) , Donato, Mattia (Author) , Porro, Matteo (Author) , Fischer, Peter (Author)
Format: Article (Journal)
Language:English
Published: 12 January 2015
In: Journal of Instrumentation
Year: 2015, Volume: 10, Issue: 1, Pages: ?
ISSN:1748-0221
DOI:10.1088/1748-0221/10/01/C01011
Online Access:Verlag, Volltext: http://dx.doi.org/10.1088/1748-0221/10/01/C01011
Verlag, Volltext: http://stacks.iop.org/1748-0221/10/i=01/a=C01011
Get full text
Author Notes:M. Kirchgessner, J. Soldat, A. Kugel, M. Donato, M. Porro, P. Fischer
Description
Summary:The readout chain of the DSSC 1M pixel detector currently built at DESY, Hamburg for the European X-Ray Free Electron Laser is described. The system operates in pulsed operation mode comparable to the new ILC. Each 0.1 seconds 800 images of 1M pixels are produced and readout by the DSSC DAQ electronics. The total data production rate of the system is about 134 Gbit/s. In order to deal with the high data rates, latest technology components like the Xilinx Kintex 7 FPGA are used to implement fast DDR3-1600 image buffers, high speed serial FPGA to FPGA communication and 10 GB Ethernet links concentrated in one 40 Gbit/s QSFP+ transceiver.
Item Description:Gesehen am 26.10.2017
Physical Description:Online Resource
ISSN:1748-0221
DOI:10.1088/1748-0221/10/01/C01011