Monolayer dual gate transistors with a single charge transport layer
A dual gate transistor was fabricated using a self-assembled monolayer as the semiconductor. We show the possibility of processing a dielectric on top of the self-assembled monolayer without deteriorating the device performance. The two gates of the transistor accumulate charges in the monomolecular...
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| Hauptverfasser: | , , , , , |
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| Dokumenttyp: | Article (Journal) |
| Sprache: | Englisch |
| Veröffentlicht: |
07 April 2010
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| In: |
Applied physics letters
Year: 2010, Jahrgang: 96, Heft: 14 |
| ISSN: | 1077-3118 |
| DOI: | 10.1063/1.3379026 |
| Online-Zugang: | Verlag, Volltext: https://doi.org/10.1063/1.3379026 Verlag, Volltext: https://aip.scitation.org/doi/10.1063/1.3379026 
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| Verfasserangaben: | M. Spijkman, S.G.J. Mathijssen, E.C.P. Smits, M. Kemerink, P.W.M. Blom, D.M. de Leeuw |
| Zusammenfassung: | A dual gate transistor was fabricated using a self-assembled monolayer as the semiconductor. We show the possibility of processing a dielectric on top of the self-assembled monolayer without deteriorating the device performance. The two gates of the transistor accumulate charges in the monomolecular transport layer and artifacts caused by the semiconductor thickness are negated. We investigate the electrical transport in a dual gate self-assembled monolayer field-effect transistor and present a detailed analysis of the importance of the contact geometry in monolayer field-effect transistors. |
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| Beschreibung: | Gesehen am 12.12.2019 |
| Beschreibung: | Online Resource |
| ISSN: | 1077-3118 |
| DOI: | 10.1063/1.3379026 |