An analysis of memristive stateful logics under various operational conditions
Memristive technology is one of the most promising emerging technologies for In-Memory Computing (IMC), which aims to reduce the need for data movement between memory and processing units. Memristive stateful logics further extend this paradigm by enabling logic operations to be performed directly w...
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| Autori principali: | , , |
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| Natura: | Article (Journal) |
| Lingua: | inglese |
| Pubblicazione: |
29 April 2026
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| In: |
IEEE access
Year: 2026, Volume: 14, Pages: 65641-65653 |
| ISSN: | 2169-3536 |
| DOI: | 10.1109/ACCESS.2026.3688985 |
| Accesso online: | Verlag, kostenfrei, Volltext: https://doi.org/10.1109/ACCESS.2026.3688985 Verlag, kostenfrei, Volltext: https://ieeexplore.ieee.org/document/11499389/authors 
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| Note sull'autore: | Roya Rahimi Disfani, Mojtaba Valinataj, and Nima TaheriNejad, (Member, IEEE) |
| Riassunto: | Memristive technology is one of the most promising emerging technologies for In-Memory Computing (IMC), which aims to reduce the need for data movement between memory and processing units. Memristive stateful logics further extend this paradigm by enabling logic operations to be performed directly within memory arrays. However, the correctness and reliability of such logic operations are strongly affected by memristive non-idealities, including device variations and leakage, and a systematic comparative evaluation of different stateful logic families under these conditions remains open. To lower this gap, this paper presents a comprehensive simulation-based analysis of three key memristive stateful logics, Material Implication (IMPLY), Three Memristors Stateful Logic (TMSL) and Fast and Energy-efficient Logic (FELIX). To accurately capture memristive non-idealities and reflect their impact on logic behavior in a realistic setting, we employ the BEhavioral Leakage and IntEr-cycle Variability Emulator model for ReRAM (BELIEVER) within an LTspice-based Monte Carlo framework. We investigate the impact of device and configuration parameter variations on output correctness, and also consider power consumption, energy efficiency, and delay for optimal settings. The results reveal distinct robustness characteristics and trade-offs among the three logic families, and enable the identification of reliable and optimal operational conditions. Furthermore, the reliability of sequential logic operations is analyzed to assess scalability toward larger circuit designs. These findings establish critical design margins and provide practical guidelines for the development of robust and variation-aware memristive IMC systems. |
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| Descrizione del documento: | Veröffentlicht: 29. April 2026, Artikelversion: 4. Mai 2026 Gesehen am 19.06.2026 |
| Descrizione fisica: | Online Resource |
| ISSN: | 2169-3536 |
| DOI: | 10.1109/ACCESS.2026.3688985 |